👁️ 187 views
University of Barishal Logo

University of Barishal

Department of Computer Science and Engineering

Final Exam

Course Title: Computer Architecture and Organization (CSE-2203)

Semester: 4th | Session: 19-20

Time: 180 minutes | Marks: 60.00

Course Teacher: Dr. Md. Manjur Ahmed

1.


a) Differentiate between SRAM and DRAM.

Please SUBSCRIBE to view full question

Topics: RAM Solution is Coming!
4 Marks
b) Explain Moor's Law in Computer architecture

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
c) Regarding Cache design, write short notes on the following: i) Hit time ii) Miss penalty

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
2.


a) In interrupt handler, analyze the step(s): (i) no interrupt, (ii) interrupt pending.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
b) How much memory space 8080 will provide that has 16 bit address bus?

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
2 Marks
c) Describe with figure: Asynchronous timing diagram for system bus Read/Write cycle.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
6 Marks
3.


a) Analyze the concept of "Write Back" in order to avoid the bottleneck of "Write Through".

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
b) Let's design a cache of 64KByte. Main memory is 16Mbytes. Cache block is 4 bytes (2 bit word identifier) and rest of bits is block identifier. Use the concept of direct mapping address.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
8 Marks
4.


a) What are the differences among direct mapping, associative mapping and set- associative mapping?

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
b) Assume that there are three (03) small caches, each consisting of eight (08) one-word blocks. One cache is fully associative, a second is two-way set associative, and third is direct mapped. Now, find the number of misses for each cache organization given the following sequence of block address: 0, 8, 0, 6, 8

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
5 Marks
c) List and briefly define three (03) techniques for performing I/O.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
3 Marks
5.


a) Explain the performance of a processor.

Please SUBSCRIBE to view full question

Topics: Processor Performance Solution is Coming!
3 Marks
b) Von Neumann computer architecture is the basic computer architecture for the modern computer. Explain this.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
5 Marks
c) Describe the multiplexed bus with advantages and disadvantages.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
6.


a) Describe the necessity of I/O modules?

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
2 Marks
b) In Direct Memory Access (DMA) operation, describe about "Cycle Stealing"

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
6 Marks
c) Describe O/S as a resource manager in I/O controller.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
7.


a) By Showing the major components of a CPU, briefly describe how a CPU works.

Please SUBSCRIBE to view full question

Topics: Central Processing Unit (CPU) Solution is Coming!
2 Marks
b) Distinguish between RISC and CISC processor.

Please SUBSCRIBE to view full question

Topics: Processor Solution is Coming!
2 Marks
c) How Stack is organized in CPU? With proper block diagram, describe following types of stack: (i) Register and (ii) Memory Stack.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
8 Marks
8.


a) Describe how an assembler works with its two phases.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
3 Marks
b) Distinguish between 0-addresses, 2-addresses, 3-addresses instruction with the example a = b + c.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
4 Marks
c) Write two short notes from the below: i) Op-code, ii) Machine Language, iii) Vector Processor.

Please SUBSCRIBE to view full question

Topics: N/A Solution is Coming!
5 Marks

Contributors of this Question:

Role Name Date
Prepared By (Teacher): Dr. Md. Manjur Ahmed N/A
Uploaded By: Onebyzero Edu (Test User) Aug. 1, 2024, 4:24 p.m.
Converted By (Img/PDF to Text): Subrina Jahan Meem Nov. 15, 2025, 10:04 a.m.
Reviewed By: Obaydul Hasan Nayeem Nov. 15, 2025, 10:26 p.m.